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Tag: socs
Broadcast SoCs bring HEVC technology to terrestrial markets.
2014-09-15 14:32:31| Industrial Newsroom - All News for Today
Designed for set-top boxes, Hybrid Satellite and Terrestrial SoC Broadcast Devices combine HEVC with advanced modulation efficiencies of DVB-S2, DVB-T2, ISDB-T, and ATSC, and high-performance IP connectivity with MoCA 2.0. Devices feature single Full Band Capture tuner and 1-2 DVB-S2 demodulators, HDMI 2.0 and component output, and OpenGL ES 2.0 Graphics Engine. Engineered with pin-to-pin compatibility, series allows single set-top design to be leveraged across entire family. This story is related to the following:Computer Hardware and PeripheralsSearch for suppliers of: Integrated Circuits (IC)
Tags: technology
bring
markets
broadcast
Broadcom announces next generation Cisco Security Certification for 4 HEVC Ultra HD SoCs
2014-09-12 17:30:38| Digital TV News
Broadcom (NASDAQ: BRCM) has announced that it has received Cisco security certification on four of its set-top box HEVC 4K/Ultra HD SoCs. Broadcom is the first chip maker to achieve the latest generation Cisco VideoGuard security certification for pay TV.
Tags: security
generation
ultra
hd
STMicroelectronics introduces SoCs for second generation 4K Ultra HD STBs
2014-09-10 16:00:44| Digital TV News
STMicroelectronics (NYSE: STM) has introduced four new low-power SoCs that pave the way for the large-scale deployment of new UHDp60-enabled '4K' set-top boxes. The new SoCs will be demonstrated at IBC 2014.
Tags: generation
ultra
hd
introduces
Broadcom announces eight hybrid satellite and terrestrial SoCs
2014-09-09 14:30:53| Digital TV News
Broadcom has announces the world's first single-chip hybrid direct broadcast satellite terrestrial and IP devices for set-top boxes with integrated HEVC and MoCA 2.0.
Tags: satellite
hybrid
announces
terrestrial
EDA Software aids 20 mm SoCs and FPGA design.
2014-08-25 14:30:25| Industrial Newsroom - All News for Today
Featuring algorithms that accelerate compile times, Quartus® II software Arria® 10 edition v14.0 provides users with 20 nm FPGA and SoC design environment. Features include portfolio of 20 nm-optimized IP cores includes standard protocol and memory interfaces, DSP, and SoC IP cores. Also, optimized IP cores are provided for Arria 10 FPGAs and SoCs, which include 100G Ethernet, 300G Interlaken, Interlaken Look-Aside, and PCIe Gen3 IP. This story is related to the following:Electronic Design Automation (EDA) Software
Tags: software
design
aids
eda
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