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Agilent Technologies, Aldec Present Validating a Digital Signal Processing Algorithm Session ...

2013-05-11 06:00:00| Industrial Newsroom - All News for Today

What: Agilent Technologies and Aldec will present a session on how to validate a digital signal processing algorithm for both floating and fixed point levels. Attendees will gain insight on a cross-domain approach to traditional FPGA design flow and learn how to validate FPGA designs for leading edge wireless and radar systems with a system-level simulation tool integrated into the traditional hardware design flow.<br /> <br /> When: 2:00 PM - 4:00 PM, Wed., June 5, 2013<br /> <br /> Where: ...

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