Home Clock Generators provides ultra-low jitter of 100 fsec.
 

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Clock Generators provides ultra-low jitter of 100 fsec.

2015-10-06 14:31:07| Industrial Newsroom - All News for Today

Supplied in 7 x 7 mm QFN package, LMK033x8 promotes telecommunications infrastructure equipment reliability. Up to 2 PLLatinum™ fractional-N PLLs with 8 outputs enable jitter performance of 100 fsec RMS over multiple integration bandwidths (1 KHz to 5 MHz and 12 KHz to 20 MHz). Pin-mode control feature enables designers to select from 71 pre-programmed frequency startup plans. While integrated EEPROM facilitates customization, I²C interface gives designers control of device configuration.

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