Preconfigured with programmable 1- or 2-channel digital downconverter loaded into onboard Xilinx Virtex-6 FPGA, Model 71641 is capable of digitizing one 12-bit channel at 3.6 GHz or 2 channels at 1.8 GHz. Each DDC has independent 32-bit tuning frequency programmable from DC to ƒs, where ƒs is A/D sampling frequency. In single channel mode, DDC decimation can be programmed to 8x, 16x, or 32x. In dual channel mode, both channels share same decimation rate, programmable to 4x, 8x, or 16x.
This story is related to the following:Analog-to-Digital Converters |