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EDA Software aids 20 mm SoCs and FPGA design.

2014-08-25 14:30:25| Industrial Newsroom - All News for Today

Featuring algorithms that accelerate compile times, Quartus® II software Arria® 10 edition v14.0 provides users with 20 nm FPGA and SoC design environment. Features include portfolio of 20 nm-optimized IP cores includes standard protocol and memory interfaces, DSP, and SoC IP cores. Also, optimized IP cores are provided for Arria 10 FPGAs and SoCs, which include 100G Ethernet, 300G Interlaken, Interlaken Look-Aside, and PCIe Gen3 IP. This story is related to the following:Electronic Design Automation (EDA) Software

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