Wideband frequency synthesizers have become widespread recently, enabling software-defined radios that address the diverse frequency bands in LTE, MC-GSM, WCDMA, CDMA, TD-SCDMA, and WiMAX infrastructure systems with shared hardware. Although several manufacturers offer built-in algorithms that automatically select from integrated multiple voltage-controlled oscillator (VCO) and capacitor array structures, many system builders find themselves wondering why their phase-locked loop (PLL) will not lock properly and consistently. With an eye on practical identification and correction methods, this article discusses common user implementation errors and fixes. By Pete Hanish, Applications Engineer, Texas Instruments