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Multiprotocol PHY IP supports 1.25-12.5 Gbps throughput.
2014-02-04 14:31:02| Industrial Newsroom - All News for Today
With DesignWare® Enterprise 12G PHY IP, designers can integrate multiple enterprise protocols, including PCI Express 3.0, SATA 6G, 10GBASE-KR, 10GBASE-KX4, 1000BASE-KX, CEI-6G/11G, SGMII, QSGMII, SFF-8431, CPRI, OBSAI, and JESD204B, into system-on-chips. Analog front-end incorporates power saving features in both active and standby modes. Hybrid transmit drivers support low power voltage mode and high swing current mode, along with L1 sub-states and decision feedback equalization bypass mode. This story is related to the following:Central Processing Unit (CPU), Intellectual Property (IP), Microprocessor & Processor Cores | Network Hardware
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