Built on multi-threaded architecture, Cadence® Joules™ RTL Power Solution lets SoC designers analyze power consumption during design exploration. Rapid prototype technology enables this register-transfer level (RTL) power analysis solution to analyze designs of up to 20 million instances with gate-level accuracy within 15% of final power as signed off in Cadence Voltus™ IC Power Integrity Solution. Also, additional integration fosters system-level power analysis and optimization.