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Microsemi and Athena Announce FPGA Cores with Strong DPA Countermeasures for Cryptography Users

2015-10-13 21:25:18| Electronics - Topix.net

The new portfolio, based on Athena's TeraFirei 1 2 cryptographic microprocessor family, is designed for users of Microsemi's award-winning SmartFusioni 1 22 system-on-chip field programmable gate arrays and IGLOOi 1 22 FPGAs. , director of vertical marketing, Microsemi Defense, Security and Computing.

Tags: users strong announce athena

 

Microsemi and Athena Announce FPGA Cores with Strong DPA Countermeasures for Cryptography Users

2015-10-13 21:10:25| Semiconductors - Topix.net

The new portfolio, based on Athena's TeraFirei 1 2 cryptographic microprocessor family, is designed for users of Microsemi's award-winning SmartFusioni 1 22 system-on-chip field programmable gate arrays and IGLOOi 1 22 FPGAs. , director of vertical marketing, Microsemi Defense, Security and Computing.

Tags: users strong announce athena

 
 

Microfluidic cooling yields huge performance benefits in FPGA processors

2015-10-06 19:30:12| Extremetech

New research on microfluidic channels etched into silicon offers dramatically improved cooling potential for future PC hardware.

Tags: performance benefits huge cooling

 

FPGA Design Software optimizes power consumption and more.

2015-10-06 14:31:07| Industrial Newsroom - All News for Today

Used for development of FPGA products, Libero system-on-chip (SoC) v11.6 supports RTG4™ high-speed signal processing radiation-tolerant FPGAs and enhances usability for DDR and high-speed serial designs. RTG4 support includes IO Advisor, SmartPower, and uProm support, and additional features are available for SmartFusion™2 SoC FPGAs and IGLOO™2 FPGAs. Solution automatically optimizes hold violations using minimum delay repair and provides multi-pass options in layout for large designs.

Tags: more software design power

 

ASIC and FPGA Engineer

2015-09-02 11:03:49| Space-careers.com Jobs RSS

Airbus Defence and Space is a division of Airbus Group formed by combining the business activities of Cassidian, Astrium and Airbus Military. The new division is Europes number one defence and space enterprise, the second largest space business worldwide and among the top ten global defence enterprises. It employs some 40,000 employees generating revenues of approximately 14 billion per year. A vacancy for an ASIC and FPGA Engineer has arisen within the Communication Processor Group with Airbus Defence and Space based in Stevenage. The Communication Processors group is responsible for the development of Digital Processors for use in telecommunication Satellites. The processor functionality ranges from high capacity channelisers, supporting intersatellite optical data links, to implementing cryptographic algorithms to protect the spacecraft. In this rewarding role you will be developing some of the highest performing digital communication payload equipment available anywhere in the world, and be part of the rapidly expanding UK space sector. The availability of advanced Payload Equipment is the driving force behind the digital telecommunication satellite industry, and the team is a proven world leader in this field. We are committed to offering continuous training and career development. We understand that our success is based on our people and we strive to offer all our employees an enjoyable and rewarding career. Your main tasks and responsibilities will include Decomposition of requirements into an architecture design and document the chosen design whilst describing any tradeoffs performed. Detailed RTL design in VHDL. Verification of the RTL design and documenting the verification that was performed. Gate level implementation of the design including synthesis, placement and static timing analysis. Support integration of the ASIC FPGA into the target hardware. Ensure that all ASIC FPGA designs are developed in accordance with the company design process. Support customer design reviews. We are looking for candidates with the following skills and experience Educated to degree level in Electronic Engineering or related discipline. Experienced in the complete Design flow from Requirements to Design acceptance. Experienced in FPGA technologies and their tools including Xilinx ISE and Microsemi Libero. Experienced in VHDL simulation tools in particular Mentor Graphics Questa. Experienced in synthesis and STA tools ideally those from Synopsys. Experience of the Linux operating system would be beneficial. Knowledge of scripting languages including TCL and PERL would be beneficial. Good analytical skills and methodical approach to problem resolution and investigations. Good communication skills and able to thrive in a team environment. Ability to present technical data in a clear and concise manner. Please apply for this vacancy on line at our careers site www.jobs.airbusgroup.com with your CV attached. To apply click here

Tags: engineer asic fpga fpga asic

 

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