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Virtex-7 FPGA Connectivity Kit accelerates design productivity.
2013-10-17 14:29:46| Industrial Newsroom - All News for Today
Virtex®-7 FPGA VC709 Connectivity Kit is intended for those who need to prototype low-power, high-performance, single-chip PCIe® Gen3, 40 Gbps Ethernet applications. This 40 Gbps platform includes fully validated and supported reference design running on Virtex-7 X690T FPGA, design tools, and IP cores that streamline evaluation and development of connectivity systems. Kit also includes Vivado™ Design Suite and FMC I/O expansion header. This story is related to the following:Test and Measuring InstrumentsSearch for suppliers of: Evaluation Boards
Tags: design
kit
productivity
connectivity
JESD204B FPGA Debug Software Accelerates High-Speed Design
2013-10-11 06:00:00| Industrial Newsroom - All News for Today
Free, on-chip, 2-D statistical eyescan software enables fast in-system verification of high-speed data converter-to-FPGA signal integrity.<br /> <br /> NORWOOD, Mass. — Analog Devices, Inc. (NASDAQ: ADI), a global leader in high-performance signal processing technology, released today an FPGA-based reference design with software and HDL code that reduces the design risk of high-speed systems incorporating JESD204B-compatible converters. Called the JESD204B Xilinx Transceiver Debug Tool, ...This story is related to the following:Software Development Tools |
Tags: software
design
debug
software design
FPGA Evaluation Kit complies with PCI Express form factor.
2013-10-07 14:29:53| Industrial Newsroom - All News for Today
With IGLOO® 2 FPGA Evaluation Kit, designers can evaluate integration, low power, security, instant-on, and high reliability features of IGLOO2 FPGAs. Kit includes 12K logic element M2GL010T-1FGG484 device, RJ45 interface to 10/100/1000 Ethernet, Full-Duplex SERDES SMAs, 512 MB of LPDDR, 64 MB SPI Flash, and USB-UART connections, as well as I2C, SPI, and GPIO headers. Kit allows development and testing of PCIe Gen2 x1 lane designs, as well as testing of FPGA transceiver's signal quality. This story is related to the following:Evaluation Boards
Cost-Effectively Verify System Clocks with an FPGA and JTAG / Boundary Scan
2013-10-02 06:00:00| Industrial Newsroom - All News for Today
Richardson, TX – A new eBook from ASSET- InterTech (<a href="http://www.asset-intertech.com">www.asset-intertech.com</a>), the leading supplier of tools for embedded instrumentation, explains how cost-effective verification of system clocks during prototype circuit board bring-up and manufacturing can be accomplished with several different methods based on JTAG / boundary-scan testing or IP in an FPGA.<br /> <br /> Faulty clocks will simply prevent processors, chipsets, ASICS, FPGAs and ...
Tags: system
verify
scan
boundary
Altera Begins Production Shipments of FPGA Industry's Highest Performance SoCs
2013-09-25 06:00:00| Industrial Newsroom - All News for Today
Density, Architectural, Productivity and Processor Performance Leadership Enable SoCs to Target Widest Range of Applications<br /> <br /> SAN JOSE, Calif. – Altera Corporation (Nasdaq: ALTR) today announced production availability of its Cyclone® V SoCs and engineering sample availability of its Arria® V SoCs. With increased processor peak clock frequencies - Cyclone V SoCs at 925 MHz for commercial-grade and 700 MHz for automotive-grade, and Arria V SoCs at 1.05 GHz for industrial-grade ...This story is related to the following:Electronic Components and Devices Sponsored by: Globtek Inc. - Your Power Partner...For Over 20 Years!Green & CleanSearch for suppliers of: Programmable Logic Devices | Integrated Circuits (IC)
Tags: performance
production
highest
begins
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