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Tag: itut
Ethernet/IP Tester validates SLAs to ITU-T Y.1564 standard.
2016-02-01 14:31:06| Industrial Newsroom - All News for Today
With ExpertSAM™, users can test ability of Ethernet-based services to carry variety of traffic at defined performance levels. Application is based on ITU Y.1564 standard and supports testing of 10 Gbps Ethernet links. Throughput, Frame Loss, Frame Delay, and Frame Delay Variation (cumulatively known as Service Acceptance Criteria) are measured and compared to expected values for each service ensuring it is within committed range or threshold defined for guaranteed traffic such as CIR.
Tags: standard
tester
validates
slas
ITU-T invites comments on standardization work.
2015-12-22 14:31:10| Industrial Newsroom - All News for Today
International Telecommunication Union Telecommunication Standardization Sector (ITU-T) recently established a new Study Group 20 (ITU-T SG20) on Internet of Things and its applications including smart cities and communities. Central part of this study is the standardization of end-to-end architectures for IoT, and mechanisms for interoperability of IoT applications and datasets employed by various vertically oriented industry sectors.
Tags: comments
work
invites
standardization
TCXOs enable compliance to ITU-T G.8262.
2015-03-20 13:31:08| Industrial Newsroom - All News for Today
Suited for small cell, wireless, and instrumentation applications, 7 x 5 mm Model TL602 and 5 x 3.2 mm Model ML602 are used with 0.1 Hz (and higher) filter bandwidths for compliance with T1-based hierarchy specifications such as ITU-T G.8262 Option 1 and 2 ECC and ITU-T G.813 Option 1 and 2 SEC, Stratum 3 for Sonet, IEEE1588, and Synchronous Ethernet. Units utilize analog temperature compensation and maintain 280 ppb pk-pk frequency stability over industrial temperature range of -40 to +85°C.
Tags: enable
compliance
itut
enable compliance
OTN Clock Translator complies with ITU-T G.8251 standard.
2014-12-04 14:30:49| Industrial Newsroom - All News for Today
Housed in 5 x 5 mm 32-pin QFN package, 3-input, 3-output Model ZL30169 integrates digital PLL, analog PLL, and EEPROM. Device provides jitter performance of 250 fs RMS, suitable for 100G coherent optical networks. APLL generates ultralow jitter output clocks programmable to any frequency from 1 Hz to 1,035 MHz. With programmable loop bandwidth from 14–500 Hz, DPLL accepts any input frequency from 1 kHz to 1,250 MHz and provides hitless reference switching, holdover, and jitter filtering.
Tags: standard
clock
translator
complies
Synchronization Chip complies with ITU-T G.813 options 1, 2.
2013-09-11 14:30:55| Industrial Newsroom - All News for Today
Accepting 10 CMOS clock reference inputs, Model STC5429 generates 10 synchronized clock outputs including 2 frame pulse clocks for frequencies ranging from 2 kHz to 156.25 MHz. Two independent timing generators, T0 and T4, may operate in Freerun, Synchronized, and Holdover modes. T0 supports master/slave and multiple master operation for redundant design, while T4 only supports master operation. Applications include Ethernet equipment clocks, DOCSIS, SDH/SETS, and SONET. This story is related to the following:Integrated Circuits (IC)
Tags: options
chip
complies
synchronization