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Tag: mezzanine
Dual FPGA Mezzanine Card incorporates Kintex-7 FPGA.
2015-03-24 13:31:07| Industrial Newsroom - All News for Today
Featuring Xilinx® Kintex-7 FPGA, AMC502 consists of dual FPGA Mezzanine Card (FMC) carrier per VITA 57 specification supplied in double-module, mid-size AMC. This product has 32 MB Flash memory and on-board crystal referenced clock source to provide at least 125 MHz as GTX reference input for PCIe, SRIO, and GbE. LVDS crossbar switch and PLL promote clock flexibility and clean signals.
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Switched Mezzanine Card supports ARINC 429.
2015-03-18 13:31:08| Industrial Newsroom - All News for Today
Designed for embedded, laboratory, and simulator applications, RAR-XMC High Density XMC Interface supports maximum data throughput on all channels while providing onboard message scheduling, label filtering, multiple buffering options, receive message time-tagging and error detection, and IRIG-B receiver and generator. Up to 16 transmit and 32 receive channels are available. With front I/O or P14/P16 rear I/O, RAR-XMC represents next generation in avionics computing.
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FPGA Mezzanine Card combines A/D and D/A converter.
2015-01-16 14:30:49| Industrial Newsroom - All News for Today
Compliant to VITA 57 specification, Model FMC525 combines 14-bit 5.7 Gsps D/A converter and 12-bit 4.0 Gsps A/D converter. DAC core is based on quad-switch architecture that enables dual-edge clocking operation, increasing DAC update rate to 5.7 Gsps when configured for Mix-Mode™ or 2x interpolation. Input sampling clock can be via front panel or on board wide-band PLL. Model FMC525 is suited for RADAR, LTE/Broadband communications systems, ATE, and video/broadcast uses.
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Mezzanine Financing on the Upswing as Industry Sees More Construction
2015-01-14 15:00:00| National Real Estate Investor
Borrowers have a growing appetite for mezzanine loans that is fueled by redevelopment and refinancing activity, as well as the return of new construction. read more
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Advanced Mezzanine Card suits wireless front end systems.
2014-07-22 14:30:55| Industrial Newsroom - All News for Today
Based around Xilinx Virtex-7 FPGA, AMC-V7 is suited for LTE wireless front-end systems requiring multiple 10G CPRI links at up to rate option 8. IDT CPS-1848 Serial RapidIO Gen 2 switch supports SRIO V2.1 at up to 20 Gbps per port, while 3 front panel SFP+ optical interfaces provide flexible high-speed links, and are configurable as CPRI, OBSAI, GigE, SRIO, or other standards. In addition, optional SRIO mini-SAS connector provides high-speed cabled connectivity. This story is related to the following:Computer Hardware and PeripheralsSearch for suppliers of: Communications Boards |
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