Full certification enables customers to tape out 16nm FinFET designs using Cadence tools<br />
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SAN JOSE, Calif. – Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced its digital, custom and signoff tools have received V1.0 Design Rule Manual (DRM) and SPICE certification for TSMC's 16nm FinFET process, enabling joint customers to begin taping out FinFET-based designs using Cadence® tools. Cadence's digital, custom/analog ...This story is related to the following:Software Development Tools | Electronic Design Automation (EDA) Software | Simulation Software