Complete DesignWare® LPDDR4 IP solution includes DesignWare LPDDR4 multiPHY, Enhanced Universal DDR Memory Controller (uMCTL2), and verification IP (VIP) as well as hardening and signal integrity services. Support is provided for all key LPDDR4 features, including up to 3,200 Mbps performance and multiple power consumption reduction features. Suited for mobile and graphics-intensive SoCs, solution is also backwards compatible with LPDDR3 and DDR3/4 SDRAMs and supports split PHY implementation.
This story is related to the following:Central Processing Unit (CPU), Intellectual Property (IP), Microprocessor & Processor Cores