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SoC Design Software supports plug-and-play IP.

2013-10-30 13:30:30| Industrial Newsroom - All News for Today

To enable accelerated and predictable design cycles, Vivado Design Suite 2013.3 automates critical aspects of UltraFast™ design methodology, delivering design rule checks that guide engineers throughout design cycle. System-wide co-optimization of design and Xilinx IP enables designers to share clocking resources throughout design with connectivity IP such as Ethernet MAC or PCIe®. By dynamically swapping functions on demand, Partial Reconfiguration technology maximizes usage of device resources. This story is related to the following:Electronic Design Automation (EDA) Software

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Category:Industrial Goods and Services

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