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Verification IP enables audio and control interfaces.

2015-03-23 13:31:08| Industrial Newsroom - All News for Today

Based on native SystemVerilog UVM architecture, Synopsys VIP for MIPI® SoundWire enables IP, subsystem, and SoC designers to integrate designs and accelerate verification. SystemVerilog source code test suites eliminate tasks of developing verification environment and required tests. Complete with verification plans, built-in coverage, and support for protocol-aware debug, product accelerates verification closure for designers of low power audio and control interfaces used in mobile devices.

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