Embedded in Design Compiler® RTL synthesis, DFTMAX Ultra enables testing of several die in parallel. System contains technology that streams compressed test data in and out of design-for-test circuitry, lowering amount of data required to achieve high manufacturing quality of silicon parts. Tool-generated architecture requires fewer test pins and enables silicon parts to operate at higher frequencies while in test mode.
This story is related to the following:Electronic Design Automation (EDA) Software