je.st
news
Home
› Multi-Output, 1.65-GHz Clock Buffer And Divider Delivers Low Jitter To Optimize Noise Performance In Ultra-High-Speed Data Converters
Multi-Output, 1.65-GHz Clock Buffer And Divider Delivers Low Jitter To Optimize Noise Performance In Ultra-High-Speed Data Converters
2013-02-13 01:05:00| wirelessdesignonline News Articles
Analog Devices, Inc. recently introduced a clock buffer and divider IC (integrated circuit) that combines high-speed, extremely low jitter (41 fs across the 12-kHz to 20-MHz band) and selectable division capability.
Tags: data
low
performance
noise
Category:Telecommunications
Latest from this category |
All news |
||||||||||||||||||||
|
|