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VHDL Design Engineer for ASICFPGA
2015-11-05 18:05:10| Space-careers.com Jobs RSS
Thales Alenia Space is a joint venture between Thales 67 and Finmeccanica 33. For more than 40 years now, Thales Alenia Space has designed, integrated, tested, operated and delivered innovative space systems. Our cuttingedge products and services meet the needs of commercial and government customers from around the world, spanning the space, defense, science and security markets. Thales Alenia Spaces satellites and payloads are recognized worldwide as benchmarks in delivering communications and navigation services, monitoring our environment and the oceans, better understanding climate change and supporting scientific research. Today, Thales Alenia Space is one of the main suppliers to the International Space Station, and a pivotal player in systems to explore our Universe. Along with Telespazio, Thales Alenia Space forms the Space Alliance, which offers a complete range of solutions and services. Because of our unrivaled expertise in dual civilmilitary missions, constellations, flexible payloads, altimetry, meteorology and highresolution radar and optical observation, Thales Alenia Space is the natural partner to countries that want to expand their space program. Thales Alenia Space logged consolidated sales exceeding 2 billion euros in 2014, and has some 7,500 employees in 8 countries. Description Design and Development of satellite embedded digital cardsequipment Good understanding of functional specifications and definition of technical solutions VHDL Digital Integrated Circuits Design PreSynthesis and Post Layout RTL Verification RTLogic Synthesis and Circuit Place Route Support to validate designs Design Reporting Design reviews with customers Requirements Education Bachelors Degree in Telecommunication IndustrialElectronic Engineering ExperienceSkills Three or more years of experience in digital microelectronic design FPGA, ASIC Electronic digital design communication buses, memories, FPGAs, Strong knowledge in microprocessors environmentdevelopment. DHL Languages VHDL and Verilog. Synthesis Tools SynplicityPrecision FPGAs design environment XILINX ISE o ACTEL DESIGNER Knowledge in data processing with FPGAs, DSPs. Knowledge in MATLABSimulink programming and low level C Knowledge in space standards ECSS and CE Experience in digital ASICs design and synthesis Scripts Perl y TCL Languages English required. French as an asset. Other Skills Good written and verbal communication skills Capability to work within a cross functional team and independently. Experience working in an international environment. Behavioral attributes responsible, pragmatic, results and client oriented, agile and dynamic. Rigurous in process following. We will not evaluate application submitted by email. Please, send you application to the following link. httpsthales.taleo.netcareersection2jobsearch.ftl?langeslocation124170115817searchExpandedfalse Thank you.
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vhdl
design engineer
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