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ASICFPGA Verification Engineer Vrificateur FPGAs ASICs

2020-02-20 16:13:16| Space-careers.com Jobs RSS

MDAs digital service, a Canadian leader in the development of satellites and satellite components, is looking for engineers with academic knowledge, practical experience and above all a passion for digital circuit validation. MDA develops FPGAs and ASICs and is looking to expand its team of digital verifiers. Responsibilities Under the supervision of a Senior Verification Engineer, the intermediate verifier will be called upon to develop SystemVerilog or VHDL test benches for the verification of ASICs or FPGAs apply the various techniques and approaches of the Universal Verification Methodology UVM contribute to the development of the test infrastructure document and report problems found to designers and assist them in identifying the source of the problems support laboratory testing. Requirements Experience in writing test benches in SystemVerilog. Knowledge of VHDL sufficient to navigate through an existing design. Knowledge of UVM validation environments. Knowledge of Mentor Graphics QuestaSim digital simulator. Knowledge of the Linux environment, scripting languages Shell, Tcl, Python, makefile. Familiarity with testbed automation techniques Jenkins Knowledge of source code management techniques SVN, GIT. Bachelors degree in electrical engineering, computer engineering or equivalent. 3 to 10 years experience in digital verification. Good interpersonal communication and teamwork skills. Good oral and written communication skills in French and English. Familiarity with Agile and Jira development methods. Multitasking ability.

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