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ASIC FPGA Engineer
2017-06-23 15:10:26| Space-careers.com Jobs RSS
Airbus GroupA vacancy has arisen within Airbus Defence and Space for a Digital design Engineer within the Communication Processors Group based in Stevenage.The Communication Processors group is responsible for the development of Digital Processors for use in telecommunication Satellites. The processor functionality ranges from high capacity channelisers, supporting intersatellite optical data links, to implementing cryptographic algorithms to protect the spacecraft. In this rewarding role you will be developing some of the highest performing digital communication payload equipment available anywhere in the world, and be part of the rapidly expanding UK space sector.The availability of advanced Payload Equipment is the driving force behind the digital telecommunication satellite industry, and the team is a proven world leader in this field. We are committed to offering continuous training and career development. We understand that our success is based on our people and we strive to offer all our employees an enjoyable and rewarding career. Your main tasks and responsibilities will include Decomposition of requirements into an architecture design and document the chosen design whilst describing any tradeoffs performed. Detailed RTL design in VHDL. Verification of the RTL design and documenting the verification that was performed. Gate level implementation of the design including synthesis, placement and static timing analysis. Support integration of the ASIC FPGA into the target hardware. Ensure that all ASIC FPGA designs are developed in accordance with the company design process. Support customer design reviews. Experienced in the complete design flow from requirements to design acceptance. Experienced in FPGA technologies and their tools including Xilinx ISE and Microsemi Libero. Experienced in VHDL simulation tools in particular Mentor Graphics Questa. Experienced in synthesis and STA tools ideally those from Synopsys. Good analytical skills and methodical approach to problem resolution and investigations. Good communication skills and able to thrive in a team environment. Ability to present technical data in a clear and concise manner. Experience of the Linux operating system would be beneficial. Knowledge of scripting languages including TCL and PERL would be beneficial. Educated to degree level in Electronic Engineering or related discipline Please apply for this vacancy on line at our careers site www.jobs.airbusgroup.com with your CV attached. By submitting your CV or application you are consenting to Airbus Group using and storing information about you for monitoring purposes relating to your application or future employment. This information will only be used by Airbus Group.Airbus is committed to achieving workforce diversity and creating an inclusive working environment. We welcome all applications irrespective of social and cultural background, age, gender, disability, sexual orientation or religious belief.To apply click here
Tags: engineer
asic
fpga
asic fpga
Senior FPGA Engineer
2016-10-25 18:05:44| Space-careers.com Jobs RSS
Airbus Defence and Space is a division of Airbus Group formed by combining the business activities of Cassidian, Astrium and Airbus Military. The new division is Europes number one defence and space enterprise, the second largest space business worldwide and among the top ten global defence enterprises. It employs some 40,000 employees generating revenues of approximately 14 billion per year. A vacancy for a Senior FPGA Engineer has arisen within Airbus Defence Space in Newport. You will be responsible to the Head of Common Hardware for executing allocated FPGA Work Packages within agreed cost, time and quality constraints. You will be responsible for demonstrating that the developed product meets all specified product and customer requirements, by analysing requirements, specifying and documenting the FPGA solution and work breakdown, preparing FPGA architectural and detailed designs and documentation, FPGA design generation and implementation, FPGA design verification, integration of FPGAs onto the target platform, providing FPGA technical support , supporting the company FPGA development process and procedure updates. The successful candidate will be subject to security clearance in order to undertake related work in accordance with business needs. You will need to ensure that All FPGAs are designed, developed, integrated and tested in accordance with Airbus Defence Space standards all supporting documents are produced in accordance with Airbus Defence Space standards. Appropriate processes and methodologies are used to design and deliver allocated FPGA development work packages meeting cost, time and quality targets, agreed with their engineering team leader. Technical design decisions are made within the context of known practices, established precedents and acquired technical expertise. The costbenefits of design possibilities are understood, enabling appropriate judgement calls to be made. FPGA development plans can be estimated in detail, and resource requirements can be allocated against plans. The provision of technical guidance to fellow team members in FPGA development tools and methodologies Success of both internal and external design reviews and project reviews throughout the development life cycle. The support of the design and development of critical components where decisions have a significant impact on project timescales. Customer liaison, by representing Airbus Defence Space on project related technical matters at stakeholder meetings. Design and development by taking a technical role as a Prime on a critical component where required. Career development of both the job holder and their team members if any, by agreeing challenging and business focused objectives. The successful applicant will have the following skills and experience Educated to Degree Level or equivalent in Electronics engineering, Essential Experience Must have extensive experience of FPGA design implementation for datavoice communications equipment or equivalent Must have excellent FPGA development process knowledge Able to carry out development tasks of up to six months duration with very limited supervision Must have recent design experience of several of the following device families Altera Cyclone III, Cyclone V, Stratix II, Lattice ECP3 Microsemi ProAsicPLUS, SmartFusion 2 Xilinx Kintex 7, Virtex 7 Must have recent experience of using several of the following toolsdevelopment environments Altera Quartus II Lattice Diamond Mentor HDL Designer Mentor ModelSim MicroSemi Libero IDE Microsemi Libero SoC Xilinx Vivado Essential Skills Must be proficient in the use of VHDL Must be proficient in the use of at least one simulation tool Must be proficient in the use of at least one FPGA synthesis tool Must have a good understanding of requirements capture, and of work package definition and estimation Must be highly selfmotivated, articulate, with good verbal and written communications skills Must have good team working skills Desirable Skills Experience of FPGA development for cryptographic systems using UK approved cryptographic design methodologies. Please apply on line for this vacancy using your eRecruiting profile with your CV attached. Airbus Group is committed to achieving workforce diversity and creating an inclusive working environment. We welcome all applications irrespective of social and cultural background, age, gender, disability, sexual orientation or religious belief. Airbus Group Recruitment Centre To apply click here
Tags: senior
engineer
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senior engineer
Intel launches Stratix 10: Altera FPGA combined with ARM CPU, 14nm manufacturing
2016-10-10 20:27:19| Extremetech
Intel announced a major new Altera product today. The Stratix 10 FPGA family can offer up to 2x the performance of its predecessor, with dramatically reduced power consumption.
Tags: combined
manufacturing
cpu
arm
Digital and FPGA Design Engineer
2016-09-14 16:04:20| Space-careers.com Jobs RSS
HE Space is a successful international space company. For over 30 years, we have been supporting our customers with qualified experts in the field of engineering, science and administration. We are currently looking for a Digital and FPGA Design Engineer to support our customer in Germany. Digital and FPGA Design Engineer Key Tasks and Responsibilities You will be responsible for the development of digital avionic equipments for use in orbital systems and, you will have the following tasks Design and development of safetycritical avionic boards for space applications Design and development of redundancy concepts for fault tolerant avionic boards Development of schematic designs via the Cadence toolset Mentor Graphics Development and commissioning of spacequalified central processing unit CPU boards and commercialofftheshelf COTS CPU boards Improving the durability of COTS based boards Implementation and documentation of test software in ANSI CC Writing of technical documentation, e.g. relating to design, development and verification Execution of test campaigns. Participation in Test Readiness Review TRR, Test Review Board TRB, NonConformance Review Boards NRB, and generation of posttest documentation Evaluation of test results. Skills Experience You will have the following qualifications and relevant experience University degree in electronics or informatics Previous work experience in Electronics and IT Experience programming in ANSI CC Experience using the Cadence toolset Mentor Graphics to enter schematic designs Experience designing FPGA Field Programmable Gate Array using the VHDL Very High Speed Integrated Circuit Hardware Description Language Experience in advanced circuit design Familiatiry with digital data transmission standards, including SpaceWire, Time Triggered Ethernet, PCIe, USB, TAXI Fluency in English is mandatory knowledge of German is an advantage. This job is located in Bremen. We welcome applicants who are available from October 2016 or as soon as possible thereafter. If you think you have what it takes for this job, please send us your CV together with a letter of motivation both in English and in Word to Ms Elisa Manfreda at jobshespace.com, quoting job DEBSC3219 preferably before 19Sep16. An exciting and dynamic international working environment awaits you! Please note Due to work permit requirements for this position, please apply only if you are citizen of a European Union state or if you are eligible to obtain a work permit for Germany.
Tags: design
digital
engineer
fpga
FPGA Skills Lead
2016-08-31 16:04:42| Space-careers.com Jobs RSS
Thales Alenia Space TAS has more than 40 years experience in designing, integration, testing, operation and commissioning of innovative space systems. Using some of the worlds most sophisticated technologies, we meet the needs of a variety of commercial, government, scientific and security customers. Our teams create the technology to monitor our oceans, help us better understand climate change and drive scientific progress. We also supply the International Space Station and, as such, play a pivotal role in exploring the universe. As the FPGA Skill Lead based in our Bristol office, youll lead the team on design, specification and implementation of FPGA designs to relevant European Space Agency Flight Standards. This will involve the ability to start from customer requirements and be closely involved with the FPGA design and development right through to final delivery. This is an excellent opportunity to join a growing organisation within a highly innovative environment and shape your career. Reporting to the Electrical Engineering Resource Manager the candidate with perform and when required provide technical oversight on the following Customer requirements analysis Architectural design Derivation of design solutions considering hardwaresoftware partitioning Assessment and tradeoff of design options RTL level design in VHDL Specification of analogue functions Simulation, logic and analogue Logic synthesis Use of FPGA layout tools and methods of obtaining timing closure Testbench design and code coverage tools Definition of testvalidation procedures Liaise with customers and subcontractors on technical issues In addition the FPGA Skills Lead will Advise and mentor other members of the Electronics Design team on technical approach risk and analysis of options to meet the design criteria and specifications across TAS UK electronics business Be responsible for reviewing proposals in shaping the approach and offering to best retire risk and maximise performance and fit with customer requirements. This will include approving the scope of work and milestones. LeadSupport reviews at all levels of the design, development and testing of the function Work with the Electrical Engineering Resource Manager, and Head of Competence Centre to develop plans for strategic development of the TAS UK capabilities The position will be based at the TASUK Bristol office but up to 20 of work may need to be conducted at subcontractors or customer premises, typically in UK or Europe. Key Responsibilities and Tasks Lead FPGA activities for TASUK Advise and mentor other members of the Electronics Design team Deliver defined tasks to budget schedule Review and approve specifications, architectures, development and validation plans LeadSupport reviews at all levels of the design, development and testing of the function Optimise approaches to engineering processes Develop plans for strategic development of tools and processes Key Internal Relationships for the FPGA Skills Lead Electrical Engineering Resource Manager for overall supervision CTO for Engineering tools and processes Manufacturing Assembly Integration Project Manager for definition of work packages and detailed project oversight of task delivery Other engineering teams to define interfaces, requirements specification and verification to support hardware design, implementation test activity Product Assurance Manager for support of investigation and correction of problems. External Relationships Customer interaction to achieve consensus on technical aspects Technical oversight of subcontract delivery
Tags: lead
skills
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skills lead
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